41#ifndef __DS160PR810_H_
42#define __DS160PR810_H_
48#define OFFSET_CHANNEL_0 0x00
49#define OFFSET_CHANNEL_1 0x20
50#define OFFSET_CHANNEL_2 0x40
51#define OFFSET_CHANNEL_3 0x60
54#define RX_DET_STS 0x00
57#define RX_DET_CTRL1 0x03
58#define RX_DET_CTRL2 0x09
61#define BROADCAST_WRITE_ALL 0x80
62#define BROADCAST_WRITE_0_1 0xA0
63#define BROADCAST_WRITE_2_3 0xC0
66#define GENERAL_CONTROL_REGISTER 0xE2
67#define EEPROM_STATUS_REGISTER 0xE3
68#define DEVICE_ID0_REGISTER 0xF0
69#define DEVICE_ID1_REGISTER 0xF1
uint8_t DS160PR810_getEELoadComplete(DS160PR810 *self, BankNumber bank_number)
Definition ds160pr810.c:570
EQStage1Bypass
Bypass state of CTLE first stage.
Definition ds160pr810.h:90
@ EQ_STAGE1_BYPASS_DISABLE
Bypass is disable (Stage 1 is active)
Definition ds160pr810.h:90
@ EQ_STAGE1_BYPASS_ENABLE
Bypass is enale (Stage 1 is bypassed)
Definition ds160pr810.h:91
Status __DS160PR810_writeByte(DS160PR810 *self, BankNumber bank_number, uint8_t MemAddress)
Write a byte of data to DS160PR810 from the ds160pr810::_reg::raw_data.
Definition ds160pr810.c:99
ApplyTo
Definition ds160pr810.h:106
@ CHANNEL1
Channel 1 of Bank 0 (Channel 1)
Definition ds160pr810.h:121
@ CHANNEL4_5
Channel 0 and 1 of Bank 1 (Channel 4 and 5)
Definition ds160pr810.h:130
@ CHANNEL2
Channel 2 of Bank 0 (Channel 2)
Definition ds160pr810.h:122
@ BANK1_CHANNEL1
Channel 1 of Bank 1 (Channel 5)
Definition ds160pr810.h:114
@ BANK0_CHANNEL3
Channel 3 of Bank 0 (Channel 3)
Definition ds160pr810.h:109
@ BANK1_ALL_CHANNELS
Channel 0 to 3 of Bank 1 (Channel 4 to 7)
Definition ds160pr810.h:134
@ BANK0_CHANNEL0_1
Channel 0 and 1 of Bank 0 (Channel 0 and 1)
Definition ds160pr810.h:110
@ CHANNEL0
Channel 0 of Bank 0 (Channel 0)
Definition ds160pr810.h:120
@ BANK1_CHANNEL2
Channel 2 of Bank 1 (Channel 6)
Definition ds160pr810.h:115
@ CHANNEL6_7
Channel 2 and 3 of Bank 1 (Channel 6 and 7)
Definition ds160pr810.h:131
@ CHANNEL7
Channel 3 of Bank 1 (Channel 7)
Definition ds160pr810.h:127
@ CHANNEL2_3
Channel 2 and 3 of Bank 0 (Channel 2 and 3)
Definition ds160pr810.h:129
@ BANK1_CHANNEL2_3
Channel 2 and 3 of Bank 1 (Channel 6 and 7)
Definition ds160pr810.h:118
@ CHANNEL6
Channel 2 of Bank 1 (Channel 6)
Definition ds160pr810.h:126
@ BANK1_CHANNEL0
Channel 0 of Bank 1 (Channel 4)
Definition ds160pr810.h:113
@ BANK0_CHANNEL1
Channel 1 of Bank 0 (Channel 1)
Definition ds160pr810.h:107
@ BANK0_CHANNEL2_3
Channel 2 and 3 of Bank 0 (Channel 2 and 3)
Definition ds160pr810.h:111
@ ALL_BANKS
Channel 0 to 3 of all banks (Channel 0 to 7)
Definition ds160pr810.h:135
@ BANK0_CHANNEL0
Channel 0 of Bank 0 (Channel 0)
Definition ds160pr810.h:106
@ BANK1_CHANNEL0_1
Channel 0 and 1 of Bank 1 (Channel 4 and 5)
Definition ds160pr810.h:117
@ BANK0_CHANNEL2
Channel 2 of Bank 0 (Channel 2)
Definition ds160pr810.h:108
@ CHANNEL4
Channel 0 of Bank 1 (Channel 4)
Definition ds160pr810.h:124
@ BANK0_ALL_CHANNELS
Channel 0 to 3 of Bank 1 (Channel 0 to 3)
Definition ds160pr810.h:133
@ CHANNEL5
Channel 1 of Bank 1 (Channel 5)
Definition ds160pr810.h:125
@ BANK1_CHANNEL3
Channel 3 of Bank 1 (Channel 7)
Definition ds160pr810.h:116
@ CHANNEL3
Channel 3 of Bank 0 (Channel 3)
Definition ds160pr810.h:123
@ CHANNEL0_1
Channel 0 and 1 of Bank 0 (Channel 0 and 1)
Definition ds160pr810.h:128
Status DS160PR810_resetRegisters(DS160PR810 *self)
Resets the DS160PR810 registers.
Definition ds160pr810.c:75
uint8_t DS160PR810_getCTLE_Stage1(DS160PR810 *self, ApplyTo target)
Reads the DS160PR810 CTLE first stage gain index. This function reads gain index of the first stage o...
Definition ds160pr810.c:439
#define BROADCAST_WRITE_ALL
Definition ds160pr810.h:61
Status __DS160PR810_getChannelConfig(DS160PR810 *self, ApplyTo target, uint8_t ChannelRegister)
Reads the configuration of a channel register of the DS160PR810 This function reads configuration val...
Definition ds160pr810.c:203
BankNumber
Bank indexes.
Definition ds160pr810.h:78
@ BANK1
Bank 1.
Definition ds160pr810.h:79
@ BANK0
Bank 0.
Definition ds160pr810.h:78
uint8_t DS160PR810_getCTLE_Stage2(DS160PR810 *self, ApplyTo target)
Reads the DS160PR810 CTLE second stage gain index. This function reads gain index of the second stage...
Definition ds160pr810.c:462
Status DS160PR810_setClearRxDetectStateMachine(DS160PR810 *self, ApplyTo target)
Clear the reset flag of the RX detect state machine.
Definition ds160pr810.c:339
#define BROADCAST_WRITE_0_1
Definition ds160pr810.h:62
TxVOD DS160PR810_getDCGain_TxVOD(DS160PR810 *self, ApplyTo target)
Reads the TX VOD of the DS160PR810.
Definition ds160pr810.c:487
uint8_t DS160PR810_getEELoadFail(DS160PR810 *self, BankNumber bank_number)
Definition ds160pr810.c:575
uint8_t DS160PR810_getDevID1(DS160PR810 *self, BankNumber bank_number)
Reads device ID1 of the specific bank of th DS160PR810.
Definition ds160pr810.c:565
EQDCGain
DC gain.
Definition ds160pr810.h:95
@ EQ_DC_GAIN_0db
0 db
Definition ds160pr810.h:95
@ EQ_DC_GAIN_3db5
3.5 db
Definition ds160pr810.h:96
uint8_t DS160PR810_getEEAtemptCount(DS160PR810 *self, BankNumber bank_number)
Definition ds160pr810.c:580
Status
Status enum.
Definition ds160pr810.h:72
@ STATUS_OK
Means everything is OK.
Definition ds160pr810.h:72
@ STATUS_ArgumentError
Arguments are wrong.
Definition ds160pr810.h:74
@ STATUS_TimeOut
The commiunication timed out.
Definition ds160pr810.h:73
EQDCGain DS160PR810_getDCGain_EQDCGain(DS160PR810 *self, ApplyTo target)
Reads the DC gain of the DS160PR810.
Definition ds160pr810.c:510
#define OFFSET_CHANNEL_2
Definition ds160pr810.h:50
uint8_t DS160PR810_getDevID0(DS160PR810 *self, BankNumber bank_number)
Reads device ID0 of the specific bank of th DS160PR810.
Definition ds160pr810.c:551
TxVOD
TX VOD.
Definition ds160pr810.h:100
@ TX_VOD_0db
0 db
Definition ds160pr810.h:103
@ TX_VOD_m3db5
-3.5 db
Definition ds160pr810.h:101
@ TX_VOD_m1db6
-1.6 db
Definition ds160pr810.h:102
@ TX_VOD_m6db
-6 db
Definition ds160pr810.h:100
#define OFFSET_CHANNEL_3
Definition ds160pr810.h:51
Status DS160PR810_setResetRxDetectStateMachine(DS160PR810 *self, ApplyTo target)
Resets the RX detect state machine.
Definition ds160pr810.c:301
Status DS160PR810_init(DS160PR810 *self, I2C_HandleTypeDef *hi2c, uint8_t BANK0_I2C_ADDR)
Initialize the DS160PR810 with the given config.
Definition ds160pr810.c:55
RxDetectStatus DS160PR810_getRxDetectStatus(DS160PR810 *self, ApplyTo target)
Reads the RX detect status of the DS160PR810.
Definition ds160pr810.c:535
#define OFFSET_CHANNEL_1
Definition ds160pr810.h:49
EQStage1Bypass DS160PR810_getCTLE_EQStage1Bypass(DS160PR810 *self, ApplyTo target)
Reads the DS160PR810 CTLE first stage status. This function reads status of the first stage of CTLE.
Definition ds160pr810.c:416
#define BROADCAST_WRITE_2_3
Definition ds160pr810.h:63
Status DS160PR810_setDCGain(DS160PR810 *self, ApplyTo target, TxVOD tx_vod, EQDCGain dc_gain)
Set the DC gain settings of the DS160PR810.
Definition ds160pr810.c:387
Status __DS160PR810_readByte(DS160PR810 *self, BankNumber bank_number, uint8_t MemAddress)
Read a byte of data from DS160PR810 and stores in the ds160pr810::_reg::raw_data.
Definition ds160pr810.c:120
#define OFFSET_CHANNEL_0
Definition ds160pr810.h:48
struct ds160pr810 DS160PR810
Class (struct) that stores variables for interacting with DS160PR180.
RxDetectStatus
Rx Detect Status.
Definition ds160pr810.h:83
@ RX_DET_N
Detected on N.
Definition ds160pr810.h:84
@ RX_DET_P
Detected on P.
Definition ds160pr810.h:85
@ RX_DET_NONE
Nothing detected.
Definition ds160pr810.h:83
@ RX_DET_BOTH
Detected on both.
Definition ds160pr810.h:86
Status DS160PR810_setCTLE(DS160PR810 *self, ApplyTo target, EQStage1Bypass isByPassed, uint8_t Stage1, uint8_t Stage2)
Set the CTLE setting of the DS160PR810.
Definition ds160pr810.c:260
Status __DS160PR810_setChannelConfig(DS160PR810 *self, ApplyTo target, uint8_t ChannelRegister)
Configures the channel registers for the DS160PR810 This function writes configuration values to a sp...
Definition ds160pr810.c:163
Definition ds160pr810.h:160
uint8_t device_id0
Definition ds160pr810.h:161
uint8_t RESERVED2
Definition ds160pr810.h:161
uint8_t RESERVED
Definition ds160pr810.h:161
Definition ds160pr810.h:164
uint8_t device_id1
Definition ds160pr810.h:165
Definition ds160pr810.h:156
uint8_t eecfg_cmplt
Definition ds160pr810.h:157
uint8_t eecfg_atmpt
Definition ds160pr810.h:157
uint8_t RESERVED
Definition ds160pr810.h:157
uint8_t eecfg_fail
Definition ds160pr810.h:157
Definition ds160pr810.h:172
uint8_t eq_bst2
Definition ds160pr810.h:173
uint8_t eq_en_bypass
Definition ds160pr810.h:173
uint8_t eq_bst1
Definition ds160pr810.h:173
uint8_t RESERVED
Definition ds160pr810.h:173
Definition ds160pr810.h:176
uint8_t drv_sel_vod
Definition ds160pr810.h:177
uint8_t RESERVED
Definition ds160pr810.h:177
uint8_t eq_hi_gain
Definition ds160pr810.h:177
Definition ds160pr810.h:152
uint8_t rst_i2c_regs
Definition ds160pr810.h:153
uint8_t frc_eeprom_rd
Definition ds160pr810.h:153
uint8_t RESERVED2
Definition ds160pr810.h:153
uint8_t RESERVED
Definition ds160pr810.h:153
Definition ds160pr810.h:180
uint8_t sel_rx_det_count
Definition ds160pr810.h:181
uint8_t en_rx_det_count
Definition ds160pr810.h:181
uint8_t RESERVED
Definition ds160pr810.h:181
uint8_t mr_rx_det_man
Definition ds160pr810.h:181
Definition ds160pr810.h:184
uint8_t mr_rx_det_rst
Definition ds160pr810.h:185
uint8_t RESERVED2
Definition ds160pr810.h:185
uint8_t RESERVED
Definition ds160pr810.h:185
Definition ds160pr810.h:168
uint8_t rx_det_comp_n
Definition ds160pr810.h:169
uint8_t rx_det_comp_p
Definition ds160pr810.h:169
uint8_t RESERVED
Definition ds160pr810.h:169
Class (struct) that stores variables for interacting with DS160PR180.
Definition ds160pr810.h:143
uint8_t BANK0_I2C_ADDR
Definition ds160pr810.h:146
union ds160pr810::_reg reg
I2C_HandleTypeDef * hi2c
Definition ds160pr810.h:145
Definition ds160pr810.h:148
uint8_t raw_data
Definition ds160pr810.h:149
struct ds160pr810::_reg::_eeprom_status_register eeprom_status_register
struct ds160pr810::_reg::_device_id1_register device_id1_register
struct ds160pr810::_reg::_general_control_register general_control_register
struct ds160pr810::_reg::_rx_det_sts rx_det_sts
struct ds160pr810::_reg::_rx_det_ctrl2 rx_det_ctrl2
struct ds160pr810::_reg::_gain_ctrl gain_ctrl
struct ds160pr810::_reg::_eq_ctrl eq_ctrl
struct ds160pr810::_reg::_device_id0_register device_id0_register
struct ds160pr810::_reg::_rx_det_ctrl1 rx_det_ctrl1